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社区长文:TapeOut 与数字电路的 AI 交叉分析Community long-form: TapeOut at the AI–digital circuit intersection

Onchaingamblr 发布编号 1–11 的长文,分析 TapeOut 在模型训练与执行之间的位置。文中引用 NeurIPS 2025 论文《Mind the Gap》:CIFAR-10 上软硬电路差距接近 3%,实验差距降低 98%。并指出 Microduck #281 用 39 个 NAND 门处理 14 位虚拟深度与目标方向,#282 用 22 个 NAND 加 3 个 LATCH 增加固定转向。V2 元件方面,第三方可开发确定性、纯计算、无管理员的固定规格元件,工厂用 BEM 取得制造能力,用户用 BNB 铸造。作者还建议首个项目输入不超过 16 位、输出不超过 4 位。Onchaingamblr published an 1–11 thread analyzing where TapeOut sits between model training and execution. It cites the NeurIPS 2025 paper "Mind the Gap": the soft–hard circuit gap on CIFAR-10 is close to 3%, and the experimental gap was reduced by 98%. It notes Microduck #281 uses 39 NAND gates to handle 14-bit virtual depth and target direction, while #282 uses 22 NAND gates plus 3 LATCHes to add fixed steering. On V2 components, third parties can build deterministic, pure-computation, admin-free fixed-spec components, factories obtain manufacturing capability with BEM, and users mint with BNB. The author also advises keeping a first project to no more than 16 input bits and 4 output bits.

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